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Publikationen

Zeige Ergebnisse 1001 bis 1010 von 14767.
  1. Ruidi Qiu; Grace Li Zhang; Rolf Drechsler; Ulf Schlichtmann; Bing Li

    CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Design

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2025), March 31 - April 2, Lyon, France, 2025.

  2. FrEDDY: Modular and Efficient Framework to Engineer Decision Diagrams Yourself

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2025), March 31 - April 2, Lyon, France, 2025.

  3. Look Ahead Optimization for Managing Nullspace in Cartesian Impedance Control of Dual-Arm Robots

    In: Look Ahead Optimization for Managing Nullspace in Cartesian Impedance Control of Dual-Arm Robots. IEEE/SICE International Symposium on System Integration (SII-2025), 17th, January 21-24, Munich, Germany, IEEE Xplore, 1/2025.

  4. Investigating the Configurability of LLMs for the Generation of Knowledge Work Datasets

    In: ICAART 2025. International Conference on Agents and Artificial Intelligence (ICAART-2025), February 23-25, Porto, Portugal, Pages 821-828, Vol. 3, ISBN 978-989-758-737-5, SciTePress, 2025.

  5. Ho Minh Duy Nguyen; An T. Le; Trung Q. Nguyen; Nghiem T. Diep; Tai Nguyen; Duy Duong-Tran; Jan Peters; Li Shen; Mathias Niepert; Daniel Sonntag

    Dude: Dual Distribution-Aware Context Prompt Learning For Large Vision-Language Model

    In: The 16th Asian Conference on Machine Learning. Asian Conference on Machine Learning (ACML-2024), December 5-8, Proceedings of Machine Learning Research, 2025.

  6. Alexander Mock; Martin Magnusson; Joachim Hertzberg

    RadaRays: Real-time Simulation of Rotating FMCW Radar for Mobile Robotics via Hardware-accelerated Ray Tracing

    In: IEEE Robotics and Automation Letters (RA-L), Vol. 10, No. 3, Pages 2470-2477, IEEE Press, 3/2025.

  7. Mohamed Nadeem; Chandan Jha; Rolf Drechsler

    Polynomial Formal Verification of Multi-Valued Approximate Circuits within Constant Cutwidth

    In: IEEE Transactions on Circuits and Systems I: Regular Papers, IEEE, 2025.

  8. Martha Schnieber; Rolf Drechsler

    Automated polynomial formal verification using generalized binary decision diagram patterns

    In: Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences, Vol. 383, No. 2288, Page 20230390, The Royal Society Publishing, 1/2025.

  9. Mohamed Nadeem; Rolf Drechsler

    Linear Formal Verification of Multi-Valued Logic Circuits within Constant Cutwidth Architectures

    In: Journal of Multiple-Valued Logic and Soft Computing, Vol. 09, Old City Publishing, 2025.