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  1. An Evolutionary Approach to Reconfigurable Scan Network Design

    In: 36. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ). GI/GMM/ITG Workshop Testmethoden und Zuverlässigkeit von …

  2. Towards ML-based Performance Estimation of Embedded Software: A RISC-V Case Study

    In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ITG/GMM/GI-Workshop "Methoden und …

  3. Towards Completeness: Security Coverage for System Level IFT

    In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ITG/GMM/GI-Workshop "Methoden und …

  4. Towards Remote Expert Supported Autonomous Assistant Robots in Shopping Environments

    In: Companion of the 2024 ACM/IEEE International Conference on Human-Robot Interaction. ACM/IEEE International Conference on Human-Robot Interaction …

  5. Streamlined Acquisition of Large Sensor Data for Autonomous Mobile Robots to Enable Efficient Creation and Analysis of Datasets

    In: 2024 IEEE International Conference on Robotics and Automation. IEEE International Conference on Robotics and Automation (ICRA-2024), May 13-17, …

  6. Soumya Sengupta; Abhoy Kole; Kamalika Datta; Indranil Sengupta; Rolf Drechsler

    AQuCiDe: Architecture Aware Decomposition of Quantum Circuits

    In: Himanshu Thapliyal; Travis Humble. Quantum Computing: Circuits, Systems, Automation and Applications. Pages 69-87, Springer, 2024.

  7. Dynamic Realization of Multiple Control Toffoli Gate

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25 - February 27, Valencia, Spain, …

  8. Complete and Efficient Verification for a RISC-V Processor using Formal Verification

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.

  9. In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures

    In: 37th International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 1/2024.

  10. Ankit Bende; Simranjeet Singh; Chandan Jha; Tim Kemper; Felix Cüppers; Christopher Bengel; Andre Zambanini; Dennis Nielinger; Sachin Patkar; Rolf Drechsler; Rainer Waser; Farhad Merchant; Vikas Rana

    Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array

    In: 37 International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 2024.