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Publikationen

Seite 2 von 5.

  1. Khushboo Qayyum; Muhammad Hassan; Sallar Ahmadi-Pour; Chandan Jha; Rolf Drechsler

    From Bugs to Fixes: HDL Bug Identification and Patching using LLMs and RAG

    In: Proceedings of the First IEEE International Workshop on LLM-Aided Design (LAD'24). IEEE International Workshop on LLM-Aided Design (LAD-24), June …

  2. Sallar Ahmadi-Pour; Muhammad Hassan; Rolf Drechsler

    Cross-Level Verification of Hardware Peripherals

    In: RISC-V Summit Europe. RISC-V Summit Europe, June 24-28, München, Germany, 2024.

  3. Chandan Jha; Khushboo Qayyum; Kemal Çaglar Coskun; Simranjeet Singh; Muhammad Hassan; Rainer Leupers; Farhad Merchant; Rolf Drechsler

    veriSIMPLER : An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing

    In: IEEE Transactions on Circuits and Systems I: Regular Papers, IEEE, 2024.

  4. Automated Equivalence Checking Method for Majority based In-Memory Computing on ReRAM Crossbars

    In: Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference …

  5. Kemal Çağlar Coşkun; Muhammad Hassan; Rolf Drechsler

    Equivalence Checking of System-Level and SPICE-Level Models of Static Nonlinear Circuits

    In: Design, Automation and Test in Europe (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

  6. Jens Trommer; Niladri Bhattacharjee; Thomas Mikolajick; Sebastian Huhn; Marcel Merten; Mohammed E. Djeridane; Muhammad Hassan; Rolf Drechsler; Shubham Rai; Nima Kavand; Armin Darjani; Akash Kumar; Violetta Sessi; Maximilian Drescher; Sabine Kolodinski; Maciej Wiatr

    Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors

    In: Design, Automation and Test in Europe Conference (DATE 2023). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, …

  7. VAST: Validation of VP-based Heterogeneous Systems against Availability Security Properties using Static Information Flow Tracking

    In: International Symposium on Quality Electronic Design (ISQED'23). International Symposium on Quality Electronic Design (ISQED-2023), April 5-7, San …

  8. Kemal Çağlar Coşkun; Muhammad Hassan; Rolf Drechsler

    New Directions for Equivalence Checking of System-Level and SPICE-Level Models of Linear Circuits

    In: 35. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ). GI/GMM/ITG Workshop Testmethoden und Zuverlässigkeit von …

  9. Security Validation of VP-based Heterogeneous Systems: A Completeness-driven Perspective

    In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ITG/GMM/GI-Workshop "Methoden und …