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Robotics Innovation Center

Publications

Page 1 of 5.

  1. Multi-Input MAGIC Synthesis and Verification for In-Memory Computing Design

    In: 55th International Symposium on Multiple-Valued Logic (ISMVL 2025). IEEE International Symposium on Multiple-Valued Logic (ISMVL-2025), June 5-6, Montreal, Canada, 2025.

  2. Towards an Automated Debugging Approach for Fault Identification in Quantum Circuits

    In: 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS-2025), May 5-7, Lyon, France, 2025.

  3. Lennart Weingarten; Kamalika Datta; Rolf Drechsler

    Polynomial Formal Verification of a RISC-V Processor

    In: IEEE Transactions on Nanotechnology, IEEE, 2025.

  4. Multi-Input MAGIC Synthesis and Verification for In-Memory Computing Design

    In: IEEE International Symposium on Multiple-Valued Logic (ISMVL). IEEE International Symposium on Multiple-Valued Logic (ISMVL-2025), June 5-6, Montreal, Canada, 2025.

  5. Lennart Weingarten; Kamalika Datta; Sallar Ahmadi-Pour; Abhoy Kole; Rolf Drechsler

    Ensuring Correctness Efficiently for RISC-V Processors with Customised Multiplier Designs

    In: Design and Verification of Cyber-Physical Systems: From Theory to Applications, Science Direct, 2025.

  6. Abhoy Kole; Mohammed E. Djeridane; Lennart Weingarten; Kamalika Datta; Rolf Drechsler

    qSAT: Design of an Efficient Quantum Satisfiability Solver for Hardware Equivalence Checking

    In: ACM Journal on Emerging Technologies in Computing Systems, ACM, 2025.

  7. Exploiting the Extended Neighborhood of Hexagonal Qubit Architecture for Mapping Quantum Circuits

    In: ACM Journal on Emerging Technologies in Computing Systems, Vol. 20, No. 4, Pages 1-19, ACM, 10/2024.

  8. In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures

    In: 37th International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 1/2024.

  9. Complete and Efficient Verification for a RISC-V Processor using Formal Verification

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.

  10. Dynamic Realization of Multiple Control Toffoli Gate

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25 - February 27, Valencia, Spain, 2024.

Contact

Main site in Bremen

Phone: +49 421 17845 0
Fax: +49 421 17845 4150


Deutsches Forschungszentrum für Künstliche Intelligenz GmbH (DFKI)
Robotics Innovation Center
Robert-Hooke-Str. 1
28359 Bremen
Germany