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Publications

Displaying results 1951 to 1960 of 14400.
  1. Which Transformer to Favor: A Comparative Analysis of Efficiency in Vision Transformers

    In: Proceedings of the Winter Conference on Applications of Computer Vision (WACV). IEEE Winter Conference on Applications of Computer Vision (WACV-2025), February 28 - March 4, Tucson, AZ, USA, AZ, USA, Pages 6955-6966, ISBN 979-8-3315-1083-1, IEEE, 2/2025.

  2. Timo Eckmann; Matthias Urban; Jan-Micha Bodensohn; Carsten Binnig

    HLR-SQL: Human-Like Reasoning for Text-to-SQL

    In: Novel Optimizations for Visionary AI Systems Workshop at SIGMOD 2025. Novel Optimizations for Visionary AI Systems Workshop (NOVAS-2025), located at SIGMOD 2025, June 22, Berlin, Germany, SIGMOD, 2025.

  3. Malte Luttermann; Jan Speller; Marcel Gehrke; Tanya Braun; Ralf Möller; Mattis Hartwig

    Approximate Lifted Model Construction

    In: Proceedings of the Thirty-Fourth International Joint Conference on Artificial Intelligence. International Joint Conference on Artificial Intelligence (IJCAI-2025), August 16-22, Montreal, QC, Canada, Pages 9077-9085, Vol. 34, IJCAI Organization, 8/2025.

  4. Towards Proofs for SCA-based Efficient Formal Verification of Complex Arithmetic Circuits

    In: 2025 IEEE International Conference on Design, Test and Technology of Integrated Systems (DTTIS). International Conference on Design, Test and Technology of Integrated Systems (DTTIS-2025), 20th, October 15-17, Athens, Greece, IEEE Xplore, 2025.

  5. Lennart Weingarten; Kamalika Datta; Abhoy Kole; Maya Ambalapat; Saeideh Nabipour; Indranil Sen Gupta; Rolf Drechsler

    A Complete Synthesis and Verification Approach for MAGIC Based In-Memory Computing

    In: 2025 IEEE International Conference on Design, Test and Technology of Integrated Systems (DTTIS). International Conference on Design, Test and Technology of Integrated Systems (DTTIS-2025), 20th, October 15-17, Athens, Greece, IEEE Xplore, 2025.

  6. Lennart Weingarten; Kamalika Datta; Rolf Drechsler

    ForMAt: Formal Verification of Scalable Multiply and Accumulate Units

    In: Forum on specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL), September 10-12, St. Goar, Germany, 2025.

  7. BDD Meets SAT: Binary Hybrid Diagrams for Efficient Generation of Multiple Solutions

    In: Forum on specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2025), September 10-12, St. Goar, Germany, 2025.

  8. Deepak Ravibabu; Sallar Ahmadi-Pour; Muhammad Hassan; Abhoy Kole; Chandan Jha; Rolf Drechsler

    System-Level Design Space Exploration for Matrix Multiplication using Compute-In-Memory Unit

    In: Forum on specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL), September 10-12, Schloss Rheinfels, Germany, 2025.

  9. Chandan Jha; Sumit Kumar Jha; Ulf Schlichtmann; Rolf Drechsler

    Formal Verification Techniques and Reliability Methods for RRAM-based Computing-in-Memory

    In: 38th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT-2025), October 21-23, Barcelona, Spain, IEEE, 2025.

  10. Mohammad Reza Heidari Iman; Rolf Drechsler; Chandan Jha; Ali Azarpeyvand; Tara Ghasempouri; Sharjeel Imtiaz; Jaan Raik; Samuele Germiniani; Daniele Nicoletti; Graziano Pravadelli; Giorgio Di Natale

    Application of Functional Verification Techniques in Hardware Trust

    In: 38th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT-2025), October 21-23, Barcelona, Spain, IEEE, 2025.