Publikationen

In: 27th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC) January 17-20 2022.

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In: Journal of Systems Architecture: Embedded Software Design (JSA) 125 Elsevier 2022.

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In: IEEE Embedded Systems Letters (ESL) IEEE 2022.

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In: 26th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2021) January 18-21 Tokyo Japan 2021.

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In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2021) February 1-5 Grenoble France 2021.

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In: 58th Design Automation Conference (DAC). Design Automation Conference (DAC-2021) December 5-9 San Francisco CA United States 2021.

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In: Journal of Systems Architecture: Embedded Software Design (JSA) Elsevier 2021.

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In: Forum on Specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2021) September 8-10 Antibes/Hybrid France 2021.

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In: 4th Workshop on RISC-V Activities. Workshop on RISC-V Activities December 2-2 virtuell 2021.

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In: 38th IEEE International Conference on Computer Design (ICCD). IEEE International Conference on Computer Design (ICCD-2020) October 18-21 Hartford United States 2020.

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Publikationen

Automated Detection of Spatial Memory Safety Violations for Constrained Devices

SymEx-VP: An Open Source Virtual Prototype for OS-Agnostic Concolic Testing of IoT Firmware

Towards Quantification and Visualization of the Effects of Concretization during Concolic Testing

Mutation-based Compliance Testing for RISC-V

An Effective Methodology for Integrating Concolic Testing with SystemC-based Virtual Prototypes

Towards Reliable Spatial Memory Safety for Embedded Software by Combining Checked C with Concolic Testing

Adaptive Simulation with Virtual Prototypes in an Open-Source RISC-V Evaluation Platform

In-Vivo Stack Overflow Detection and Stack Size Estimation for Low-End Multithreaded Operating Systems using Virtual Prototypes

Verification of RISC-V Embedded Software by Integrating Concolic Testing with SystemC-based Virtual Prototypes

Adaptive Simulation with Virtual Prototypes for RISC-V: Switching Between Fast and Accurate at Runtime

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