SystemC Verifikation mittels symbolischer Simulation einer Zwischensprache

@inproceedings{pub6729,
    author = {

Le, Hoang m.
 and 

Große, Daniel
 and 

Herdt, Vladimir
 and 

Drechsler, Rolf
},
    title = {SystemC Verifikation mittels symbolischer Simulation einer Zwischensprache},
    booktitle = {Electronic Design Automation Workshop. Electronic Design Automation Workshop (edaWorkshop-13), May 14-16, Dresden, Germany},
    year = {2013},
    publisher = {VDE}
}